| Parameter | Description |
|---|---|
| a0 | 128-bit vector a0 |
| a1 | 64-bit vector a1 |
v128 128-bit vector
Unsigned Subtract Wide. This instruction subtracts each vector element of the second source SIMD&FP register from the corresponding vector element in the lower or upper half of the first source SIMD&FP register, places the result in a vector, and writes the vector to the SIMD&FP destination register. All the values in this instruction are signed integer values.The vector elements of the destination register and the first source register are twice as long as the vector elements of the second source register.The USUBW instruction extracts vector elements from the lower half of the first source register, while the USUBW2 instruction extracts vector elements from the upper half of the first source register.Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.
Equivalent instruction: USUBW Vd.8H,Vn.8H,Vm.8B