| Parameter | Description |
|---|---|
| a0 | f16 a0 |
| a0 | f16 a0 |
| a0 | f16 a0 |
| a0 | f16 a0 |
| a0 | Pointer to the address to load from |
| a0 | Pointer to the address to load from |
| a0 | 128-bit vector a0 |
| a0 | 128-bit vector a0 |
| a0 | Pointer to the address to store to |
| a1 | 64-bit vector a1 |
| a0 | Pointer to the address to store to |
| a1 | 128-bit vector a1 |
| a0 | Pointer to the address to store to |
| a1 | 64-bit vector a1 |
void 64-bit vector
Store multiple single-element structures from one, two, three, or four registers. This instruction stores elements to memory from one, two, three, or four SIMD&FP registers, without interleaving. Every element of each register is stored.Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.
Equivalent instruction: ST1 {Vt.8B},[Xn]