| Parameter | Description |
|---|---|
| a0 | 128-bit vector a0 |
| a1 | 128-bit vector a1 |
| a2 | 128-bit vector a2 |
v128 128-bit vector
Bitwise Select. This instruction sets each bit in the destination SIMD&FP register to the corresponding bit from the first source SIMD&FP register when the original destination bit was 1, otherwise from the second source SIMD&FP register.Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.
Equivalent instruction: BSL Vd.16B,Vn.16B,Vm.16B