Method vsqaddd_u64

vsqaddd_u64(ulong, long)

Unsigned saturating Accumulate of Signed value. This instruction adds the signed integer values of the vector elements in the source SIMD&FP register to corresponding unsigned integer values of the vector elements in the destination SIMD&FP register, and accumulates the resulting unsigned integer values with the vector elements of the destination SIMD&FP register.If overflow occurs with any of the results, those results are saturated. If saturation occurs, the cumulative saturation bit FPSR.QC is set.Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.
Equivalent instruction: USQADD Dd,Dn

Declaration

public static ulong vsqaddd_u64(ulong a0, long a1)

Parameters

Type	Name	Description
ulong	a0	UInt64 a0
long	a1	Int64 a1

Returns

Type	Description
ulong	UInt64