Method vshld_s64

vshld_s64(long, long)

Signed Shift Left (register). This instruction takes each signed integer value in the vector of the first source SIMD&FP register, shifts each value by a value from the least significant byte of the corresponding element of the second source SIMD&FP register, places the results in a vector, and writes the vector to the destination SIMD&FP register.If the shift value is positive, the operation is a left shift. If the shift value is negative, it is a truncating right shift. For a rounding shift, see SRSHL.Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.
Equivalent instruction: SSHL Dd,Dn,Dm

Declaration

public static long vshld_s64(long a0, long a1)

Parameters

Type	Name	Description
long	a0	Int64 a0
long	a1	Int64 a1

Returns

Type	Description
long	Int64