Method vrshld_u64

vrshld_u64(ulong, long)

Unsigned Rounding Shift Left (register). This instruction takes each element in the vector of the first source SIMD&FP register, shifts the vector element by a value from the least significant byte of the corresponding element of the second source SIMD&FP register, places the results in a vector, and writes the vector to the destination SIMD&FP register.If the shift value is positive, the operation is a left shift. If the shift value is negative, it is a rounding right shift.Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.
Equivalent instruction: URSHL Dd,Dn,Dm

Declaration

public static ulong vrshld_u64(ulong a0, long a1)

Parameters

Type	Name	Description
ulong	a0	UInt64 a0
long	a1	Int64 a1

Returns

Type	Description
ulong	UInt64