Method vqrdmlahs_s32
vqrdmlahs_s32(int, int, int)
Signed Saturating Rounding Doubling Multiply Accumulate returning High Half (by element). This instruction multiplies the vector elements of the first source SIMD&FP register with the value of a vector element of the second source SIMD&FP register without saturating the multiply results, doubles the results, and accumulates the most significant half of the final results with the vector elements of the destination SIMD&FP register. The results are rounded.If any of the results overflow, they are saturated. The cumulative saturation bit, FPSR.QC, is set if saturation occurs.Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.
Equivalent instruction: SQRDMLAH Sd,Sn,Sm
Declaration
public static int vqrdmlahs_s32(int a0, int a1, int a2)
Parameters
Type | Name | Description |
---|---|---|
int | a0 | Int32 a0 |
int | a1 | Int32 a1 |
int | a2 | Int32 a2 |
Returns
Type | Description |
---|---|
int | Int32 |