Method vqneg_s16

vqneg_s16(v64)

Signed saturating Negate. This instruction reads each vector element from the source SIMD&FP register, negates each value, places the result into a vector, and writes the vector to the destination SIMD&FP register. All the values in this instruction are signed integer values.If overflow occurs with any of the results, those results are saturated. If saturation occurs, the cumulative saturation bit FPSR.QC is set.Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.
Equivalent instruction: SQNEG Vd.4H,Vn.4H

Declaration

public static v64 vqneg_s16(v64 a0)

Parameters

Type	Name	Description
v64	a0	64-bit vector a0

Returns

Type	Description
v64	64-bit vector