Method vqdmullh_lane_s16

vqdmullh_lane_s16(short, v64, int)

Signed saturating Doubling Multiply Long (by element). This instruction multiplies each vector element in the lower or upper half of the first source SIMD&FP register by the specified vector element of the second source SIMD&FP register, doubles the results, places the final results in a vector, and writes the vector to the destination SIMD&FP register. All the values in this instruction are signed integer values.If overflow occurs with any of the results, those results are saturated. If saturation occurs, the cumulative saturation bit FPSR.QC is set.The SQDMULL instruction extracts the first source vector from the lower half of the first source register, while the SQDMULL2 instruction extracts the first source vector from the upper half of the first source register.Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.
Equivalent instruction: SQDMULL Sd,Hn,Vm.H[lane]

Declaration

public static int vqdmullh_lane_s16(short a0, v64 a1, int a2)

Parameters

Type	Name	Description
short	a0	Int16 a0
v64	a1	64-bit vector a1
int	a2	Lane index to a1. Must be an immediate in the range of [0..3]

Returns

Type	Description
int	Int32