Method vqdmulhs_lane_s32
vqdmulhs_lane_s32(int, v64, int)
Signed saturating Doubling Multiply returning High half (by element). This instruction multiplies each vector element in the first source SIMD&FP register by the specified vector element of the second source SIMD&FP register, doubles the results, places the most significant half of the final results into a vector, and writes the vector to the destination SIMD&FP register.The results are truncated. For rounded results, see SQRDMULH.Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.
Equivalent instruction: SQDMULH Sd,Sn,Vm.H[lane]
Declaration
public static int vqdmulhs_lane_s32(int a0, v64 a1, int a2)Parameters
| Type | Name | Description |
|---|---|---|
| int | a0 | Int32 a0 |
| v64 | a1 | 64-bit vector a1 |
| int | a2 | Lane index to a1. Must be an immediate in the range of [0..1] |
Returns
| Type | Description |
|---|---|
| int | Int32 |