Method vqdmulhq_s16

vqdmulhq_s16(v128, v128)

Signed saturating Doubling Multiply returning High half (by element). This instruction multiplies each vector element in the first source SIMD&FP register by the specified vector element of the second source SIMD&FP register, doubles the results, places the most significant half of the final results into a vector, and writes the vector to the destination SIMD&FP register.The results are truncated. For rounded results, see SQRDMULH.Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.
Equivalent instruction: SQDMULH Vd.8H,Vn.8H,Vm.8H

Declaration

public static v128 vqdmulhq_s16(v128 a0, v128 a1)

Parameters

Type	Name	Description
v128	a0	128-bit vector a0
v128	a1	128-bit vector a1

Returns

Type	Description
v128	128-bit vector