Method vpadal_s32
vpadal_s32(v64, v64)
Signed Add and Accumulate Long Pairwise. This instruction adds pairs of adjacent signed integer values from the vector in the source SIMD&FP register and accumulates the results into the vector elements of the destination SIMD&FP register. The destination vector elements are twice as long as the source vector elements.Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.
Equivalent instruction: SADALP Vd.1D,Vn.2S
Declaration
public static v64 vpadal_s32(v64 a0, v64 a1)
Parameters
Type | Name | Description |
---|---|---|
v64 | a0 | 64-bit vector a0 |
v64 | a1 | 64-bit vector a1 |
Returns
Type | Description |
---|---|
v64 | 64-bit vector |