Method vmlsq_n_s32
vmlsq_n_s32(v128, v128, int)
Multiply-Subtract from accumulator (vector, by element). This instruction multiplies the vector elements in the first source SIMD&FP register by the specified value in the second source SIMD&FP register, and subtracts the results from the vector elements of the destination SIMD&FP register. All the values in this instruction are unsigned integer values.Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.
Equivalent instruction: MLS Vd.4S,Vn.4S,Vm.S[0]
Declaration
public static v128 vmlsq_n_s32(v128 a0, v128 a1, int a2)Parameters
| Type | Name | Description |
|---|---|---|
| v128 | a0 | 128-bit vector a0 |
| v128 | a1 | 128-bit vector a1 |
| int | a2 | Int32 a2 |
Returns
| Type | Description |
|---|---|
| v128 | 128-bit vector |