Method vcvtnq_s64_f64

vcvtnq_s64_f64(v128)

Floating-point Convert to Signed integer, rounding to nearest with ties to even (vector). This instruction converts a scalar or each element in a vector from a floating-point value to a signed integer value using the Round to Nearest rounding mode, and writes the result to the SIMD&FP destination register.A floating-point exception can be generated by this instruction. Depending on the settings in FPCR, the exception results in either a flag being set in FPSR, or a synchronous exception being generated. For more information, see Floating-point exception traps.Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the Security state and Exception level in which the instruction is executed, an attempt to execute the instruction might be trapped.
Equivalent instruction: FCVTNS Vd.2D,Vn.2D

Declaration

public static v128 vcvtnq_s64_f64(v128 a0)

Parameters

Type	Name	Description
v128	a0	128-bit vector a0

Returns

Type	Description
v128	128-bit vector