Method vcaltq_f64

vcaltq_f64(v128, v128)

Floating-point Absolute Compare Less than (vector). This instruction compares the absolute value of each vector element in the first source SIMD&FP register with the absolute value of the corresponding vector element in the second source SIMD&FP register and if the first value is less than the second value sets every bit of the corresponding vector element in the destination SIMD&FP register to one, otherwise sets every bit of the corresponding vector element in the destination SIMD&FP register to zero.This instruction can generate a floating-point exception. Depending on the settings in FPCR, the exception results in either a flag being set in FPSR, or a synchronous exception being generated. For more information, see Floating-point exception traps.Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.
Equivalent instruction: FACGT Vd.2D,Vn.2D,Vm.2D

Declaration

public static v128 vcaltq_f64(v128 a0, v128 a1)

Parameters

Type	Name	Description
v128	a0	128-bit vector a0
v128	a1	128-bit vector a1

Returns

Type	Description
v128	128-bit vector