Method vaddw_s16

vaddw_s16(v128, v64)

Signed Add Wide. This instruction adds vector elements of the first source SIMD&FP register to the corresponding vector elements in the lower or upper half of the second source SIMD&FP register, places the results in a vector, and writes the vector to the SIMD&FP destination register.The SADDW instruction extracts the second source vector from the lower half of the second source register, while the SADDW2 instruction extracts the second source vector from the upper half of the second source register.Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.
Equivalent instruction: SADDW Vd.4S,Vn.4S,Vm.4H

Declaration

public static v128 vaddw_s16(v128 a0, v64 a1)

Parameters

Type	Name	Description
v128	a0	128-bit vector a0
v64	a1	64-bit vector a1

Returns

Type	Description
v128	128-bit vector