Method vuqaddq_s32

vuqaddq_s32(v128, v128)

Signed saturating Accumulate of Unsigned value. This instruction adds the unsigned integer values of the vector elements in the source SIMD&FP register to corresponding signed integer values of the vector elements in the destination SIMD&FP register, and writes the resulting signed integer values to the destination SIMD&FP register.If overflow occurs with any of the results, those results are saturated. If saturation occurs, the cumulative saturation bit FPSR.QC is set.Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.
Equivalent instruction: SUQADD Vd.4S,Vn.4S

Declaration

public static v128 vuqaddq_s32(v128 a0, v128 a1)

Parameters

Type	Name	Description
v128	a0	128-bit vector a0
v128	a1	128-bit vector a1

Returns

Type	Description
v128	128-bit vector