Method vmovn_high_s64

vmovn_high_s64(v64, v128)

Signed saturating extract Narrow. This instruction reads each vector element from the source SIMD&FP register, saturates the value to half the original width, places the result into a vector, and writes the vector to the lower or upper half of the destination SIMD&FP register. The destination vector elements are half as long as the source vector elements. All the values in this instruction are signed integer values.If overflow occurs with any of the results, those results are saturated. If saturation occurs, the cumulative saturation bit FPSR.QC is set.The SQXTN instruction writes the vector to the lower half of the destination register and clears the upper half, while the SQXTN2 instruction writes the vector to the upper half of the destination register without affecting the other bits of the register.Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.
Equivalent instruction: XTN2 Vd.4S,Vn.2D

Declaration

public static v128 vmovn_high_s64(v64 a0, v128 a1)

Parameters

Type	Name	Description
v64	a0	64-bit vector a0
v128	a1	128-bit vector a1

Returns

Type	Description
v128	128-bit vector