Method vcgtd_f64

vcgtd_f64(Double, Double)

Floating-point Compare Greater than (vector). This instruction reads each floating-point value in the first source SIMD&FP register and if the value is greater than the corresponding floating-point value in the second source SIMD&FP register sets every bit of the corresponding vector element in the destination SIMD&FP register to one, otherwise sets every bit of the corresponding vector element in the destination SIMD&FP register to zero.This instruction can generate a floating-point exception. Depending on the settings in FPCR, the exception results in either a flag being set in FPSR, or a synchronous exception being generated. For more information, see Floating-point exception traps.Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.
Equivalent instruction: FCMGT Dd,Dn,Dm

Declaration

public static UInt64 vcgtd_f64(Double a0, Double a1)

Parameters

Type	Name	Description
Double	a0	Double a0
Double	a1	Double a1

Returns

Type	Description
UInt64	UInt64